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1

National Education Policy: How does it Affect Higher Education in India?

Jagadesh Kumar, Mamidala

Journal:

IETE Technical Review

Year:

2020

File:

PDF, 532 KB

2020

2

Junctionless Field-Effect Transistors (Design, Modeling, and Simulation) || Simulation of JLFETS Using Sentaurus TCAD

Sahay, Shubham, Kumar, Mamidala Jagadesh

Year:

2019

Language:

english

File:

PDF, 1.66 MB

english, 2019

3

COVID-19: How Institutions, Teachers and Students in India have geared up for Online Education?

Jagadesh Kumar, Mamidala

Journal:

IETE Technical Review

Year:

2020

File:

PDF, 502 KB

2020

4

National Centre on Artificial Intelligence: India on the Move

Jagadesh Kumar, Mamidala

Journal:

IETE Technical Review

Year:

2019

Language:

english

File:

PDF, 516 KB

english, 2019

5

Abstracts are Windows to Your Research Article: What Makes Them Good?

Kumar, M. Jagadesh

Journal:

IETE Technical Review

Year:

2018

Language:

english

File:

PDF, 440 KB

english, 2018

6

[IEEE 2020 IEEE International Symposium on Circuits and Systems (ISCAS) - Sevilla (2020.10.12-2020.10.14)] 2020 IEEE International Symposium on Circuits and Systems (ISCAS) - 0.25pA/Bit Ultra-Low-Leakage 6T Single-Port SRAM on 22nm Bulk Process for IoT Applications

Asthana, Vivek, Kumar, M. Jagadesh, Kulshrestha, Ayush, Kumar, Munish, Banik, Saikat Kumar, Aggarwal, Shruti

Year:

2020

File:

PDF, 356 KB

2020

7

Enhanced current gain in SiC power BJTs using a novel surface accumulation layer transistor concept

M. Jagadesh Kumar, Vinod Parihar

Journal:

Microelectronic Engineering

Year:

2005

Language:

english

File:

PDF, 180 KB

english, 2005

8

Impact of Strain or Ge Content on the Threshold Voltage of Nanoscale Strained-Si/SiGe Bulk MOSFETs

Kumar, M. Jagadesh, Venkataraman, Vivek, Nawal, Susheel

Journal:

IEEE Transactions on Device and Materials Reliability

Year:

2007

Language:

english

File:

PDF, 359 KB

english, 2007

9

[IEEE 2014 International Conference on Information Communication and Embedded Systems (ICICES) - Chennai, India (2014.2.27-2014.2.28)] International Conference on Information Communication and Embedded Systems (ICICES2014) - Developing the fabricated system of automatic vehicle identification using RFID based poultry traceability system

Reddy, G S Ajay Kumar, Chandra, S. V. Jagadesh, Reddy, B. Naresh Kumar

Year:

2014

Language:

english

File:

PDF, 277 KB

english, 2014

10

Happiness and Technological Advances: Where are we heading?

Kumar, Mamidala Jagadesh

Journal:

IETE Technical Review

Year:

2017

Language:

english

File:

PDF, 393 KB

english, 2017

11

2D-simulation and analysis of lateral SiC N-emitter SiGe P-base Schottky metal-collector (NPM) HBT on SOI

M. Jagadesh Kumar, C. Linga Reddy

Journal:

Microelectronics Reliability

Year:

2003

Language:

english

File:

PDF, 239 KB

english, 2003

12

Aspergillus niger exo-inulinase purification by three phase partitioning

Vaidyanathan Vinoth Kumar, Manickam Periyaraman Premkumar, Vasanth kumar Sathyaselvabala, Selvaraj Dineshkirupha, Jagadesh Nandagopal, Subramanian Sivanesan

Journal:

Engineering in Life Sciences

Year:

2011

Language:

english

File:

PDF, 186 KB

english, 2011

13

A dc model for partially depleted SOI laterally diffused MOSFETs utilizing the HiSIM-HV compact model

Tarun Kumar Agarwal, M. Jagadesh Kumar

Journal:

Journal of Computational Electronics

Year:

2013

Language:

english

File:

PDF, 672 KB

english, 2013

14

[IEEE 2007 International Workshop on Physics of Semiconductor Devices - Mumbai, India (2007.12.16-2007.12.20)] 2007 International Workshop on Physics of Semiconductor Devices - Approaches to nanoscale MOSFET compact modeling using surface potential based models

Jagadesh Kumar, M., Batwani, Himanshu, Gaur, Mayank

Year:

2007

Language:

english

File:

PDF, 151 KB

english, 2007

15

[IEEE 2010 23rd International Conference on VLSI Design: concurrently with the 9th International Conference on Embedded Systems Design (VLSID) - Bangalore, India (2010.01.3-2010.01.7)] 2010 23rd International Conference on VLSI Design - A New Hetero-material Stepped Gate (HSG) SOI LDMOS for RF Power Amplifier Applications

Sithanandam, Radhakrishnan, Kumar, Mamidala Jagadesh

Year:

2010

Language:

english

File:

PDF, 777 KB

english, 2010

16

Guest Editorial Special Issue on Nanowire Transistors: Modeling, Device Design, and Technology

Kumar, M. Jagadesh, Reed, Mark A., Amaratunga, Gehan A. J., Cohen, Guy M., Janes, David B., Lieber, Charles M., Meyyappan, M., Wernersson, Lars-Erik, Wang, Kang L., Chau, Robert S., Kamins, Theodore I

Journal:

IEEE Transactions on Nanotechnology

Year:

2008

Language:

english

File:

PDF, 309 KB

english, 2008

17

[IEEE 2012 25th International Conference on VLSI Design - Hyderabad, India (2012.01.7-2012.01.11)] 2012 25th International Conference on VLSI Design - Modeling of Partially Depleted SOI DEMOSFETs with a Sub-circuit Utilizing the HiSIM-HV Compact Model

Agarwal, Tarun Kumar, Kumar, M. Jagadesh

Year:

2012

Language:

english

File:

PDF, 193 KB

english, 2012

18

Estimation and Compensation of Process-Induced Variations in Nanoscale Tunnel Field-Effect Transistors for Improved Reliability

Saurabh, Sneh, Kumar, M. Jagadesh

Journal:

IEEE Transactions on Device and Materials Reliability

Year:

2010

Language:

english

File:

PDF, 197 KB

english, 2010

19

A full-range dual material gate tunnel field effect transistor drain current model considering both source and drain depletion region band-to-band tunneling

Pandey, Pratyush, Vishnoi, Rajat, Kumar, M. Jagadesh

Journal:

Journal of Computational Electronics

Year:

2015

Language:

english

File:

PDF, 768 KB

english, 2015

20

Controlling Ambipolar Current in Tunneling FETs Using Overlapping Gate-on-Drain

Abdi, Dawit B., Jagadesh Kumar, M.

Journal:

IEEE Journal of the Electron Devices Society

Year:

2014

Language:

english

File:

PDF, 939 KB

english, 2014

21

Linearity and speed optimization in SOI LDMOS using gate engineering

Sithanandam, Radhakrishnan, Kumar, M Jagadesh

Journal:

Semiconductor Science and Technology

Year:

2010

Language:

english

File:

PDF, 751 KB

english, 2010

22

Realizing Efficient Volume Depletion in SOI Junctionless FETs

Sahay, Shubham, Kumar, M. Jagadesh

Journal:

IEEE Journal of the Electron Devices Society

Year:

2016

Language:

english

File:

PDF, 1.01 MB

english, 2016

23

Modeling a Dual-Material-Gate Junctionless FET Under Full and Partial Depletion Conditions Using Finite-Differentiation Method

Singh, Jaspreet, Gadi, Vijit, Kumar, Mamidala Jagadesh

Journal:

IEEE Transactions on Electron Devices

Year:

2016

Language:

english

File:

PDF, 2.14 MB

english, 2016

24

Controlling BTBT-Induced Parasitic BJT Action in Junctionless FETs Using a Hybrid Channel

Kumar, Mamidala Jagadesh, Sahay, Shubham

Journal:

IEEE Transactions on Electron Devices

Year:

2016

Language:

english

File:

PDF, 1.15 MB

english, 2016

25

Raised Source/Drain Dopingless Junctionless Accumulation Mode FET: Design and Analysis

Ramaswamy, Sindhu, Kumar, Mamidala Jagadesh

Journal:

IEEE Transactions on Electron Devices

Year:

2016

Language:

english

File:

PDF, 2.46 MB

english, 2016

26

Fundamentals of Tunnel Field-Effect Transistors || Future Perspectives

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 190 KB

english, 2016

27

Fundamentals of Tunnel Field-Effect Transistors || Carbon-Based Tunnel Field-Effect Transistor

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 433 KB

english, 2016

28

Fundamentals of Tunnel Field-Effect Transistors || III-V Tunnel Field-Effect Transistor

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 436 KB

english, 2016

29

Fundamentals of Tunnel Field-Effect Transistors || Applications of Tunnel Field-Effect Transistors

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 422 KB

english, 2016

30

Fundamentals of Tunnel Field-Effect Transistors || Basics of Tunnel Field-Effect Transistors

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 469 KB

english, 2016

31

Fundamentals of Tunnel Field-Effect Transistors || Models for Tunnel Field-Effect Transistor

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 201 KB

english, 2016

32

Fundamentals of Tunnel Field-Effect Transistors || CMOS Scaling

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 330 KB

english, 2016

33

Fundamentals of Tunnel Field-Effect Transistors || Quantum Tunneling

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 169 KB

english, 2016

34

Fundamentals of Tunnel Field-Effect Transistors || Nanowire Tunnel Field-Effect Transistor

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 390 KB

english, 2016

35

Fundamentals of Tunnel Field-Effect Transistors || Boosting ON-Current in Tunnel Field-Effect Transistor

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 446 KB

english, 2016

36

Fundamentals of Tunnel Field-Effect Transistors || Front matter

Saurabh, Sneh, Kumar, Mamidala Jagadesh

Year:

2016

Language:

english

File:

PDF, 529 KB

english, 2016

37

Nanotube Junctionless FET: Proposal, Design, and Investigation

Sahay, Shubham, Kumar, Mamidala Jagadesh

Journal:

IEEE Transactions on Electron Devices

Year:

2017

Language:

english

File:

PDF, 1.42 MB

english, 2017

38

In 0.53 Ga 0.47 As/InP Trench-Gate Power MOSFET Based on Impact Ionization for Improved Performance: Design and Analysis

Saini, Navneet Kaur, Sahay, Shubham, Saxena, Raghvendra Sahai, Kumar, Mamidala Jagadesh

Journal:

IEEE Transactions on Electron Devices

Year:

2017

Language:

english

File:

PDF, 2.61 MB

english, 2017

39

Junctionless Field-Effect Transistors (Design, Modeling, and Simulation) || Modeling Junctionless Field-Effect Transistors

Sahay, Shubham, Kumar, Mamidala Jagadesh

Year:

2019

Language:

english

File:

PDF, 1.40 MB

english, 2019

40

Junctionless Field-Effect Transistors (Design, Modeling, and Simulation) || Emerging Fet Architectures

Sahay, Shubham, Kumar, Mamidala Jagadesh

Year:

2019

Language:

english

File:

PDF, 1.22 MB

english, 2019

41

Junctionless Field-Effect Transistors (Design, Modeling, and Simulation) || Introduction to Field-Effect Transistors

Sahay, Shubham, Kumar, Mamidala Jagadesh

Year:

2019

Language:

english

File:

PDF, 586 KB

english, 2019

42

Junctionless Field-Effect Transistors (Design, Modeling, and Simulation) || Index

Sahay, Shubham, Kumar, Mamidala Jagadesh

Year:

2019

Language:

english

File:

PDF, 7 KB

english, 2019

43

[IEEE 2019 Electron Devices Technology and Manufacturing Conference (EDTM) - Singapore, Singapore (2019.3.12-2019.3.15)] 2019 Electron Devices Technology and Manufacturing Conference (EDTM) - Investigating the Doping Profiles in emerging Nanowire Junctionless Accumulation Mode FETs from the L-BTBT perspective

Jain, Aakash Kumar, Kumar, Mamidala Jagadesh

Year:

2019

Language:

english

File:

PDF, 226 KB

english, 2019

44

SP94-Targeted Triblock Co-Polymer Nanoparticle Delivers Thymidine Kinase-p53-Nitroreductase Triple Therapeutic Gene and Restores Anticancer Function against Hepatocellular Carcinoma in vivo

SUKUMAR, UDAY KUMAR, Rajendran, Jagadesh Chandra Bose, Gambhir, Sanjiv S., Massoud, Tarik F., Paulmurugan, Ramasamy

Journal:

ACS Applied Materials & Interfaces

Year:

2020

File:

PDF, 2.93 MB

2020

45

What is in store in the January-February 2020 issue of IETE Technical Review?

Jagadesh Kumar, Mamidala

Journal:

IETE Technical Review

Year:

2020

File:

PDF, 522 KB

2020

46

[IEEE 2020 6th International Conference on Advanced Computing and Communication Systems (ICACCS) - Coimbatore, India (2020.3.6-2020.3.7)] 2020 6th International Conference on Advanced Computing and Communication Systems (ICACCS) - IoT Based Smart Billing and Direction Controlled Trolley

T, Naveenprabu, B, Mahalakshmi, T, Nagaraj, S P, Naveen Kumar, M, Jagadesh

Year:

2020

File:

PDF, 578 KB

2020

47

Optimum collector EPI-thickness of advanced bipolar transistors for high speed and high current operation

M.Jagadesh Kumar, David J. Roulston

Journal:

Solid-State Electronics

Year:

1994

Language:

english

File:

PDF, 263 KB

english, 1994

48

New buried P+-grid polysilicon emitter bipolar power transistor

M.Jagadesh Kumar, David J Roulston

Journal:

Solid-State Electronics

Year:

1995

Language:

english

File:

PDF, 294 KB

english, 1995

49

Selective reactive ion etching of PECVD silicon nitride over amorphous silicon in CF4H2 and nitrogen containing CF4H2 plasma gas mixtures

M.Jagadesh Kumar, Savvas G. Chamberlain

Journal:

Solid-State Electronics

Year:

1996

Language:

english

File:

PDF, 415 KB

english, 1996

50

Enhanced breakdown voltage and reduced self-heating effects in thin-film lateral bipolar transistors: Design and analysis using 2-D simulation

Sukhendu Deb Roy, M. Jagadesh Kumar

Journal:

Microelectronic Engineering

Year:

2006

Language:

english

File:

PDF, 554 KB

english, 2006